This relates to integrated circuits and more particularly, to circuitry operable to detect soft memory errors on integrated circuits such as programmable integrated circuits and further operable to identify particular portions of a programmable integrated that is affected by the detected soft memory errors.
Programmable integrated circuits are a type of integrated circuit that can be programmed by a user to implement a desired custom logic function. In a typical scenario, a logic designer uses computer-aided design tools to design a custom logic circuit. When the design process is complete, the tools generate configuration data. The configuration data is loaded into memory elements to configure the devices to perform the functions of the custom logic circuit.
Memory elements are often based on random-access-memory (RAM) cells. Because the RAM cells are loaded with configuration data during device programming, the RAM cells are sometimes referred to as configuration memory or configuration random-access-memory cells (CRAM). During normal operation of a programmable device, loaded CRAM cells produce static output signals that are applied to the gates of transistors (e.g., pass transistors). The CRAM output signals turn some transistors on and turn other transistors off. This selective activation of certain transistors on the device customizes the operation of the device so that the device performs its intended function.
When operating in a system, programmable devices are subject to environmental background radiation. Particularly in modern programmable devices that contain large numbers of CRAM cells, there is a possibility that a radiation strike on a CRAM cell will cause the CRAM cell to change its state. For example, a CRAM cell storing a “1” configuration bit may flip its state so that the cell erroneously stores a “0” bit. When a CRAM cell changes state, the transistor that is controlled by that CRAM cell will be placed into an erroneous state. The transistor might, for example, be turned on when it should have been turned off.
Radiation-induced errors that arise in configuration random-access-memory cells are sometimes referred to as soft errors. One way in which soft errors can be addressed is to change the design of the CRAM cells. However, changes to the CRAM cells can introduce undesired circuit complexity and can consume additional circuit real estate.
Programmable devices sometimes include error detection circuitry that continuously monitors an entire array of CRAM cells. If an error is detected in the array, an error flag may be set. Systems that require highly reliable operations can monitor the status of the error flag to determine whether the programmable device has experienced any soft errors. So long as no errors are present, the system allows the programmable device to operate normally. If, however, the state of the error flag indicates that one of the configuration random-access-memory cells on the device has exhibited a soft error, the system can reconfigure the device by reloading the original configuration data into the configuration random-access-memory cells. Reloading the entire programmable device every time a soft error is detected may, however, result in unnecessarily frequent disruptions.
In an effort to reduce the frequency of system disruptions, techniques have been developed that determine whether a particular bit flip is a design sensitive bit. This technique allows the user to determine whether a soft error has an impact to the system by first detecting the error location and then analyzing whether the erroneous bit is in use by the design. This technique, however, is only capable of differentiating between bits that are used by the design and bits that are not used by the design. Erroneous bits, even those that are part of non-critical logic but are nevertheless part of the logic design, will still trigger a device reconfiguration.
It is within this context that the embodiments described herein arise.